Thursday, September 2, 2010

RC Oscillator

For timing insensitive applications, the RC device option offers additional cost savings. The RC oscillator frequency is a function of the supply voltage, the resistor (REXT) values, capacitor (CEXT) values, and the operating temperature. In addition to this, the oscillator frequency will vary from unit to unit due to normal process parameter variation.

Furthermore, the difference in lead frame capacitance between package types also affects the oscillation frequency, especially for low CEXT values. The user needs to take intoaccount variation, due to tolerance of the external R and C components.

Thursday, May 28, 2009

Oscillator Type


The PIC16F84 can be operated in four different oscillator modes. The user can program two configuration bits (FOSC1 and FOSC0) to select one of these four modes:

i. LP Low Power Crystal
ii. XT Crystal/Resonator
iii. HS High Speed Crystal/ResonatorRC Resistor/Capacitor

Sunday, April 19, 2009

PIC clock generator

Oscillator circuit is used for providing a microcontroller with a clock. Clock is needed so that microcontroller could execute a program or program instructions. Most microcontrollers will operate with a crystal and two capacitors. Some will operate with resonators or with external resistor-capacitor pair. Some microcontrollers have built-in resistor-capacitor type oscillators and they do not require any external timing components.

Friday, April 17, 2009

SFR - Special Function Robot?

The Special Function Registers are used by the CPU and Peripheral functions to control the device operation. These registers are static RAM. The special function registers can be classified into two sets, core and peripheral. Those associated with the core functions are described in this section. Those related to the operation of the peripheral features are described in the section for that specific feature

Saturday, April 11, 2009


Each General Purpose Register (GPR) is 8-bits wide and is accessed either directly or indirectly through the FSR. The GPR addresses in Bank 1 are mapped to addresses in Bank 0. As an example, addressing location 0Ch or 8Ch will access the same GPR.

Wednesday, April 8, 2009

Select Bank in PIC memory

Banking requires the use of control bits for bank selection. These control bits are located in the STATUS Register. Instructions MOVWF and MOVF can move values from the W register to any location in the register file (“F”), and vice-versa. The entire data memory can be accessed either directly using the absolute address of each register file or indirectly through the File Select Register (FSR). Indirect addressing uses the present value of the RP0 bit for access into the banked areas of data memory.

Data memory is partitioned into two banks which contain the general purpose registers and the special function registers. Bank 0 is selected by clearing the RP0 bit (STATUS<5>). Setting the RP0 bit selects Bank 1. Each Bank extends up to 7Fh (128 bytes). The first twelve locations of each Bank are reserved for the Special Function Registers. The remainder is General Purpose Registers, implemented as static RAM.

Tuesday, March 31, 2009

Data Memory

The data memory is divided into two areas. The first is the Special Function Registers (SFR) area, while the second is the General Purpose Registers (GPR) area. The SFRs control the operation of the device. Portions of data memory are banked. This is for both the SFR area and the GPR area. The GPR area is banked to allow greater than 116 bytes of general purpose RAM. The banked areas of the SFR are for the registers that control the peripheral functions.